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NeurIPS 2026UW-MadisonML systems & compilers

Efficient Adaptive Data Analysis over Dense Data Distributions

Joon Suk Huh

Sydney Poster Session 5, Thu, Dec 10, 10:00 AM–1:00 PM, Hall 1-4 · Published 2026

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NeurIPS 2026Rensselaer Polytechnic InstituteCoastal CarolinaIBM Corporation, T. J. Watson ReIndian Institute of ScienceML systems & compilers

CHoRD: Coordinating Scheduling and Data Placement for Efficient Deep Neural Network Inference on Chiplet-Based GPUs

Hanpei Liu, Samit S Miftah, Dipali Jain, Dan Fiumara and 3 more

Atlanta Poster Session 3, Thu, Dec 10, 10:00 AM–1:00 PM, Hall C1 · Published 2026

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NeurIPS 2026City University of Hong KongML systems & compilers

Small Model Portfolios for Many Deployment Profiles: Submodular Coverage under Bundled Constraints

Ji Cheng

Sydney Poster Session 5, Thu, Dec 10, 10:00 AM–1:00 PM, Hall 1-4 · Published 2026

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NeurIPS 2026tencentTencentThe Hong Kong University of ScieXi'an University of ElectroTencent AIPDML systems & compilers

AsymPipe: Accelerating Large-scale DiTs Image Editing via Asymmetry-Aware Pipeline Parallelism

Huage Deng, LYU WENKAI, WU YONGJIN, Tianyang Zheng and 5 more

Sydney Poster Session 4, Wed, Dec 9, 5:00 PM–8:00 PM, Hall 1-4 · Published 2026

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NeurIPS 2026U California, BerkeleyChinese University of Hong KongU California BerkeleyU Wisconsin - MadisonML systems & compilers

Approximation Algorithms for GPU Pricing under Finite Capacity

Yaolong Yu, Hanrui Zhang, Zeyu Zheng, Kirthevasan Kandasamy

Atlanta Poster Session 5, Fri, Dec 11, 10:00 AM–1:00 PM, Hall C1 · Published 2026

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NeurIPS 2026ColumbiaML systems & compilers

Speed Predictions for Online Energy-Efficient Scheduling

Eric Balkanski, Jingwei Li, Clifford Stein, Cherlin Zhu

Atlanta Poster Session 2, Wed, Dec 9, 4:30 PM–7:30 PM, Hall C1 · Published 2026

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NeurIPS 2026Modal/HarvardStanfordHarvardThinking Machines Lab, StanfordColumbiaML systems & compilers

Hawkeye: Hardware-Aware GPU Kernel Optimization with Minimal Supervision

Arya Tschand, Kesavan Ramakrishnan, Alexander Ingare, Simon Guo and 5 more

Sydney Poster Session 2, Tue, Dec 8, 5:00 PM–8:00 PM, Hall 1-4 · Published 2026

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NeurIPS 2026U WashingtonNorth Seattle CollegeML systems & compilers

Shellsort as Multi-Scale Relaxation: Learning Spectrum-Matched Gap Schedules

Qingyun Li, Ruoyun Li, Yunqi Li, Yunjin Li

Atlanta Poster Session 3, Thu, Dec 10, 10:00 AM–1:00 PM, Hall C1 · Published 2026

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NeurIPS 2026UC LouvainNVIDIANational University of SingaporeUCLAKTH Royal Institute of TechnologML systems & compilers

Speeding up Log-Sum-Exp: Kernel Fusion at the Memory Wall, Integer Arithmetic at the Compute Wall

Lingyun Yao, Martin Andraud, Niki Loppi, Andrea Pilzer and 3 more

Paris Poster Session 4, Thu, Dec 10, 5:30 PM–7:30 PM, Paris Poster Hall · Published 2026

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NeurIPS 2026U OxfordML systems & compilers

EENAS: Zero-Shot Energy-Efficiency-Aware Neural Architecture Search

Zeyu Yang, Wes Armour

Paris Poster Session 6, Fri, Dec 11, 2:30 PM–4:30 PM, Paris Poster Hall · Published 2026

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NeurIPS 2026WuhanILCC, University of EdinburghML systems & compilers

STParOpt: An End-to-End Framework for Execution-Aware Parallelism Inference and Optimized CUDA Migration

Meng Wang, Jinshuo Liu, Weiran Pian, Feiyang Wen and 3 more

Sydney Poster Session 3, Wed, Dec 9, 10:00 AM–1:00 PM, Hall 1-4 · Published 2026

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NeurIPS 2026George MasonThomas Jefferson High School forOak Ridge National LaboratoryML systems & compilers

HPC-Bench: A Comprehensive Benchmark for High Performance Computing Codes

Bowen Cui, Junyu Yin, Tejas Ramesh, Leo Lim and 2 more

Atlanta Poster Session 1, Wed, Dec 9, 10:00 AM–1:00 PM, Hall C1 · Published 2026

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NeurIPS 2026CornellU Maryland, College ParkCornell UniveristyML systems & compilers

GauS: Differentiable Scheduling Optimization via Gaussian Reparameterization

GauS models operator scheduling via Gaussian reparameterization to capture time's ordinal nature, cutting optimization space and yielding Pareto-optimal results.

Yaohui Cai, Vesal Bakhtazad, CUNXI YU, Zhiru Zhang

Atlanta Poster Session 2, Wed, Dec 9, 4:30 PM–7:30 PM, Hall C1 · Published 2026

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AI panel: 6 of 20 reviewers recommend it
lenient 3/5
medium 3/10
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83%Must read
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NeurIPS 2026U California, BerkeleyMassachusetts Institute of TechnShanghai JiaotongTsinghuaNVIDIAML systems & compilers

Flash-KMeans: Fast and Memory-Efficient Exact K-Means

Flash-KMeans eliminates GPU HBM bottlenecks via fused assignment and inverse mapping updates, delivering up to 17.9x speedups over existing exact k-means implementations.

Shuo Yang, Haocheng Xi, Yilong Zhao, Muyang Li and 9 more

Atlanta Poster Session 2, Wed, Dec 9, 4:30 PM–7:30 PM, Hall C1 · Published 2026 · ▲ 85 on Hugging Face · Code ★ 735

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AI panel: 13 of 20 reviewers recommend it
lenient 4/5
medium 7/10
strict 2/5
80%Must read
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NeurIPS 2026RIKEN AIPTokyo University of Agriculture ML systems & compilers

Structured Unitary Tensor Network Representations for Circuit-Efficient Quantum Data Encoding

TNQE uses structured unitary tensor networks to learn shallow, resource-efficient quantum data encoding circuits that achieve 0.04x the depth of amplitude encoding and scale to high-resolution images on real hardware.

Guang Lin, Toshihisa Tanaka, Qibin Zhao

Sydney Poster Session 1, Tue, Dec 8, 10:00 AM–1:00 PM, Hall 1-4 · Published 2026

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AI panel: 12 of 20 reviewers recommend it
lenient 5/5
medium 7/10
strict 0/5
74%Highly rated
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NeurIPS 2026LaBRI, Université de BordeauxCNRS, LaBRIML systems & compilers

GPU-Accelerated Synthesis of Mixed-Boolean Arithmetic: Beyond Caching

SIMBA is a GPU-accelerated MBA synthesizer using cache-free bottom-up enumeration to scale beyond prior CPU and cache-based GPU tools. It achieves substantial speedups, handles larger specifications, and solves expression sizes existing methods cannot.

Gabriel Bathie, Nathanaël Fijalkow

Paris Poster Session 3, Thu, Dec 10, 12:30 PM–2:30 PM, Paris Poster Hall · Published 2026

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AI panel: 9 of 20 reviewers recommend it
lenient 2/5
medium 6/10
strict 1/5